Virtual memory is a memory management technique that enlarges the address space of main physical memory (e.g., DRAM) by utilizing secondary memory (e.g., disk space). To facilitate copying virtual memory into physical memory, virtual memory addresses are divided into pages, each of which is of a pre-defined size, such as 4 KB per page. Pages thus comprise blocks of contiguous memory addresses. This allows the physical address space of a process to be noncontiguous, and hides fragmentation of physical memory by providing contiguous address spaces to application processes. When a process is executed, a memory management unit (MMU) uses page tables to translate virtual addresses into the physical addresses used by the hardware. Flags indicate whether accessed pages are present in real memory, and if not, a page fault exception is generated and the memory unit accesses secondary storage to return the page corresponding to the accessed virtual address.
Although the size of a process's virtual address space is traditionally larger than the available physical memory space, physical memory pages (DRAM pages) or rows in DRAM memory arrays are now generally larger than virtual memory pages. While a virtual memory page is typically on the order of 4 KB in size, a DRAM page can be 16 KB or more. If contiguous virtual memory pages or virtual memory pages that are accessed close together in time are allocated to different, non-contiguous DRAM pages, the address mapping would create a lack of read/write locality in the DRAM. DRAM accesses generally impose a significant amount of communication overhead in a processor. Upon a memory access, an entire page is put into the row buffer before an access can happen. Swapping pages due to lack of locality can therefore be quite expensive in terms of processor cycles. If the process involves both a read and a write, the bus must switch direction as well. Locality is thus very important, even for simple read operations.
Certain methods have been developed to simplify virtual-to-physical memory address translation, such as reservation-based physical page allocators, that allocate contiguous virtual memory pages to physical memory blocks. However, such methods typically involve the mapping of significantly large-scale pages, such as on the order of 2 MB, which corresponds to a superpage. Such methods aim to maintain the translation of single large pages, rather than enhancing DRAM locality to reduce memory access latency.
What is needed is a system that maps contiguous virtual memory pages, or pages that are accessed in a short period of time by a process/application to a single DRAM page, thus improving locality for read/write accesses at the DRAM.
The subject matter discussed in the background section should not be assumed to be prior art merely as a result of its mention in the background section. Similarly, a problem mentioned in the background section or associated with the subject matter of the background section should not be assumed to have been previously recognized in the prior art. The subject matter in the background section merely represents different approaches.